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Academic Experts
Academic Experts
Dr. Mandeep Singh Narula
ASSISTANT PROFESSOR (SR GRADE)
mandeep.narula@jiit.ac.in
Biography

Dr Mandeep Singh is currently working as an Assistant Professor (Sr. Grade) in the Electronics and Communication Engineering Department at JIIT, India (Deemed University).

He is having overall teaching and industry experience of more than 17 years. After completing his M.Tech in Microelectronics & VLSI Design from IIT Kharagpur (Qualified GATE 2006 with 99.78 percentile), he worked for leading semiconductor MNC’s for around 2 years. He has also worked as a teaching assistant at IIT Kharagpur for one year. He is having 15 years of teaching experience at reputed universities in India. He has more than 40 research publications in Journals and Conferences of National and International repute.

He is having extensive experience in designing course curriculum, setting up new labs, and preparing lab manuals, teaching UG and PG core courses, organizing industrial visits and guest lectures, etc. He has also supervised around 100 projects by undergraduate students and many Master’s degree (M.Tech) dissertations of electronics and electrical engineering students.

Research Highlights

Dr Mandeep Singh PhD thesis title is “Design and Performance Investigation of Gate/Channel Engineered Gate All Around Field Effect Transistor". The proposed device has higher drain current, good immunity to SCE and process variations, better gate control over the channel, and overall better device performance. He has done extensive research on nanowires and GAAFETs, which will replace FinFETs for smaller technology nodes. His research areas are:

1. GAAFET/Nanowire

2. Nanosheets

3. Tunnel FET

4. FinFET

5. Biosensors with high sensitivity and low response time

Areas Of Interest
  • VLSI
  • Semiconductor Devices
  • Embedded system
  • Microelectronics
  • Microcontroller and Sensors
Publications
  1. Mandeep Singh Narula, Archana Pandey, “Dual-Gate Silicon Nanowire FET with a Corner Spacer for High Performance & High Frequency Applications” –Journal of Electronic Materials (Springer) , vol. 52, issue 10, pp. 6708-6718, July 2023, Indexed in SCI and SCOPUS, Impact factor – 2.047
  2. Mandeep Singh Narula, Archana Pandey, “Gate Engineered Silicon Nanowire FET with Coaxial Inner Gate for Enhanced Performance” - Silicon Journal (Springer) Vol. 15, Issue 10, Feb 2023 - Indexed in SCI and SCOPUS, Impact factor – 2.941
  3. Mandeep Singh Narula, Archana Pandey, “Performance Evaluation of Stacked Gate Oxide/High K Spacers Based Gate All Around Device Architectures at 10 nm Technology Node”, Silicon Journal (Springer), Vol 14, Issue 5, pp 2397 – 2407, April 2022 - Indexed in SCI and SCOPUS, Impact factor – 2.941
  4. Aman Garg , Neeraj Kumar Shukla , Mandeep Singh Narula, Li Li , Bird strike-induced damage studies on bio-inspired laminated plates with holes, Aerospace Science and Technology, April 2025, doi: https://doi.org/10.1016/j.ast.2025.110200 - Indexed in SCI and SCOPUS, Impact factor – 5
  5. Mandeep Singh Narula, Archana Pandey, “A Comprehensive Review on FinFET, Gate All Around, Tunnel FET : Concept, Performance and Challenges”, IEEE International Conference on Signal Processing & Communication, Dec 2022 - Indexed in SCOPUS